Executive Summary
A quant trading firm's execution engine suffered 8bps slippage due to suboptimal routing and latency. Redesigning with FPGA-accelerated order routing and dynamic venue selection reduced slippage by 67%, adding $12M annual PnL.
Key Outcomes
- ▹ 67% reduction in execution slippage (8 → 2.6 bps)
- ▹ $12M additional annual PnL
- ▹ 300μs → 45μs order routing latency
Client Situation
The firm's systematic strategies traded 500k orders daily across 12 venues. Legacy routing used static venue weights, missing liquidity opportunities.
Key Challenges
- ⚠ Slippage eroding 15% of strategy alpha
- ⚠ Static venue weights ignoring real-time liquidity
- ⚠ Order routing latency causing missed fills
Existing Architecture
Python-based order router with round-robin venue distribution. No real-time fill probability modeling.
- 25ms decision latency causing adverse selection
- No awareness of venue-specific queue positions
- Static weights ignoring maker-taker fees
Solution Design
FPGA-accelerated smart order router using real-time fill probability models and dynamic venue selection.
Key Decisions
- ✓ Implement fill probability model using logistic regression on live data
- ✓ FPGA for sub-10μs routing decisions
- ✓ Dynamic fee-aware venue selection
Implementation
Shadow routing for 3 months before go-live, comparing decisions against existing router.
Phase 1: Phase 1: Fill Probability Model
Trained model on 100M historical orders, achieving 85% accuracy predicting immediate fill.
Phase 2: Phase 2: FPGA Router
Implemented routing logic in Verilog, achieving 8μs decision latency.
Phase 3: Phase 3: Gradual Rollout
1% → 100% traffic over 4 weeks with continuous monitoring.
Technical Challenges
- Fill probability model staleness
Impact: Liquidity patterns shift during volatile periods
Resolution: Online learning with 1-minute model updates
- FPGA memory constraints
Impact: Couldn't fit full order book for all 12 venues
Resolution: Implemented hierarchical model with per-venue feature extraction
Results
- Execution slippage (bps)
- Before8.0After2.6Improvement67% reduction
- Order routing latency
- Before300μsAfter45μsImprovement85% reduction
- Fill rate (first venue)
- Before52%After78%Improvement26% increase
Lessons Learned
- 📘 Online learning critical for adapting to liquidity shifts
- 📘 FPGA decision latency allowed participation in events previously impossible
- 📘 Fee-aware routing added 0.5bps by avoiding high-fee venues
What We Would Do Differently
- 💡 Deploy reinforcement learning for dynamic venue selection
- 💡 Add order anticipation to hide router latency entirely
Role Relevance
Quant developers with FPGA experience and market microstructure knowledge were essential for sub-50μs smart order routing.
Critical Skills Demonstrated
Related Roles
Frequently Asked Questions
- How often does the fill probability model update?
- Online learning updates every minute with latest market data.
- What's the FPGA model and cost?
- Xilinx Alveo U250, $5k per server, deployed on 8 trading servers.